# Chapter 2 -- Arithmetic Logical Unit

This is the workflow problems of Chapter 2 of the "The Elements of Computing Systems" by Noam Nisan and Shimon Schocken. These are my own solutions for my own reference.

As the NAND gate is considered primitive we build all our logical gates around this gate following order of the book. The Elements of Computing Systems.

The Half adder adds two bits, let us call the least significant bit of the addition sum and the most significant bit the carry. The expected behaviour is below

a b carry sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

sum = LSB of a + b, carry = MSB of a + b;

``````CHIP HalfAdder {
IN a, b;
OUT sum, carry;

PARTS:
And(a=a, b=b, out=carry);
Xor(a=a, b=b, out=sum);
}``````

a b c carry sum
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

sum = LSB of a + b + c, carry = MSB of a + b + c;

``````CHIP FullAdder {
IN a, b, c;
OUT sum, carry;

PARTS:
Or(a=c1, b=c2, out=carry);
}``````

16 bit add, integer 2's complement addition, overflow is neither detected nor handled.

``````CHIP Add16 {
IN a, b;
OUT out;

PARTS:
``````CHIP Inc16 {